About us
Low-power chip

A. Aubert / CEA

Who we are ?

Nellow is a start-up developing and exploiting a technology resulting from 15 years of fundamental and applied research by two world-leading laboratories on microelectronics solutions: the  Spintec laboratory (CEA Grenoble, Univ. Grenoble Alpes & CNRS), and the Laboratoire Albert Fert (CNRS, Thales and Univ. Paris Saclay).

Founders
Jean-Philippe Attané

Jean-Philippe Attané

CEO

Chief Executive Officer

Currently Chief Executive Officer & Co-founder of Nellow, Jean-Philippe was formely Professor and team director at the University of Grenoble Alpes. He has more than 25 years of experience in project management for the development of new spintronic technologies. To complement his technical background, he obtained at Grenoble Alpes University Master’s level diploma both in Law (Business Law: Labor Law, Company Law, Contract Law, IP) and in Economics (Economics and Corporate Finance: Economic diagnosis and strategy, Sector analysis, Finance). Jean-Philippe is also a former Auditor of the Institute of Advanced Business Studies (16th promotion). He has been leading the Topological Spintronics team at the Spintec laboratory (CEA Grenoble), which consisted of more than 12 full-time equivalents in 2023. He has supervised 15 PhDs (H-Factor of 32), and he is currently a Senior Member of the prestigious Institut Universitaire de France.inkedin 

Laurent Vila

CTO

Chief Technical Officer

Currently Chief Technological Officer & Co-founder of Nellow, Laurent was CEA engineer during 18 years. He co-developed the MRAM magnetic memory sector at Spintec, in particular within the framework of industrial transfer partnerships with Crocus Technology. 
He was involved in the realization of functional magnetic memory points of size of less than 10 nm. Laurent has 25 years of experience in spintronics in the US, Japan, France and Belgium, and was head of the Concept group at Spintec from 2016 to 2020. Laurent is an expert in nanofabrication using advanced lithography techniques and electrical characterization of nanodevices.  Overall, he is co-inventor on 14 patents, supervised 15 PhD theses (H-Factor of 50) and managed R&D projects of more than €3.5 million over the 18 years at CEA (national or European R&D contracts, as coordinator or partner).nedin

Manuel Bibes

CSO

Chief Scientific Officer

CNRS researcher since 2003 and Research Director since 2014. Since 2008, he is head of a research group on quantum matter based on oxides, at the CNRS/Thales Mixed Research Unit, with a headcount of 17 people in 2023. During his career, he obtained funding for more than €12 million (ANR, Horizon 2020 and Horizon Europe, industrial contacts), which led to co-authorship of more than 230 publications (including 40 articles in Nature Publishing Group journals), 19 patents, 16 PhDs and 20 post-doctoral projects (H-Factor of 78). He is a Highly Cited Researcher according to Clarivate Analytics (<0.1% of researchers worldwide), winner of three ERC projects, coordinator of 2 ANR projects and coordinator of an R&D project with Intel (2019-2021). Manuel was awarded several awards throughout his career, including EU40 Materials Prize (2013), Descartes-Huygens Prize (Academy of Sciences in 2017), Friederich-Willem Bessel Prize (Humboldt Foundation in 2017) and EuroPhysics Prize in 2022, one of the most prestigious international prizes in physics.

 

Alexandre CHARVIER

Alexandre CHARVIER

CDO

Chief Design Officer

Currently Chief Design Officer & Co-founder of Nellow, based in Grenoble, he is leading the development of Artificial Intelligence (AI) products, from roadmap definition to customer delivery. He is also responsible for the hardware and software technical development of chips based on Nellow’s innovative technology.

He has over 20 years of experience in the semiconductor industry. He began his career at ST-Ericsson/STMicroelectronics as a digital design and verification engineer for the mobile phone and set-top box industries. At Dolphin Design, a subsidiary of Soitec, he also held the position of Product Line Manager for embedded AI products. His responsibilities included managing AI products and ASIC projects for various sectors, including defense. He oversaw operational execution, budgeting, project scheduling, and contributed to business development, marketing, and pre-sales activities. He also managed a team of over 40 people across multiple sites (France, Singapore).

He holds a postgraduate degree in microelectronics and telecommunications and remains deeply involved in the continuous improvement of development flows and methodologies. He brings a strong vision and maintains active technological watch in this field.

Supported by the CEA incubation program

Nellow benefits from access to clean rooms, cutting edge nanofabrication equipments and characterization techniques.

With an expertise ranging from materials and nanodevices to integrated circuit design and advanced test, around 20 people are currently working on our laboratories on the development of our technology.

Low-power chip

A. Aubert / CE


Nellow - Ultralow-power chips based on quantum materials for logic and AI.